Senior ASIC Digital Design Engineer
3 semanas atrás
Job Description
We're at the heart of the innovations that change the way we work and play. Our team is all about integrating more capabilities into an SoC—faster. We offer the world's broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors.
The successful candidate will work in state-of-the-art IP cores and subsystems to extend the Security IP business, in the markets of High Performance Computing, Artificial Intelligence, and Automotive.
Key Responsibilities
• Design RTL in Verilog and System Verilog
• Design test environments for digital hardware Security IP cores and complex subsystems, in System Verilog and UVM
• Hardware verification of IP cores and subsystems with modern verification techniques like UVM or formal verification
• Perform functional and performance analysis of embedded hardware/software IP solutions, in cooperation with hardware and software security experts
Requirements
• Expertise in RTL design of hardware IP components
• Skills in ASIC verification (using System Verilog, UVM, Verilog)
• Ability to create test environments specifications
• MSc or PhD in Electrical Engineering or Computer Science
• 2 years of relevant experience
• Good knowledge about IC Design flows and excellent problem solving and debugging skills
• Strong communication (written and verbal) and interpersonal skills
What We Offer
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
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