Senior ASIC Digital Architect for HPC Memory IP

Há 22 horas

Lisboa, Portugal Synopsys, Inc. Tempo integral 110 000 € - 170 000 € Contrato
Synopsys, Inc. is seeking an experienced ASIC design leader to drive micro-architecture and RTL for next‑generation memory IP used in HPC and AI infrastructure. You will balance performance, power, area, and timing while collaborating with physical design and verification teams. The role requires deep knowledge of DDR/HBM protocols, mixed-signal co-design, and a track record of successful tape-outs, with mentorship experience to grow a strong engineering team.