Analog Modeling Design Engineer

Há 6 dias


Lisboa, Lisboa, Portugal Synopsys Tempo inteiro
Job Summary

Synopsys, a world leader in semiconductor IP, is seeking an Analog Modeling Design Engineer to join our Digital and Verification Development team. Key responsibilities include contributing to the development and validation of complex digital mixed signals for high-speed interface IP, with a major focus on Analog Schematics. The ideal candidate will have a university master's degree in electronic/micro-electronics engineering, knowledge of IC design flows, and experience with analog design tools. Key Qualifications
- University master's degree in electronic/micro-electronics engineering
- Knowledge of IC design flows
- Analog design knowledge
- Understanding of digital design
- Familiarity with digital verification tools
- Good team player
Preferred Experience
- 2+ years of relevant experience
- Experience with analog tools, preferably Synopsys tools
- Good understanding of analog design
- Experience in Verilog/VHDL
- Proficiency in at least one programming language such as Python, C, C++, or MATLAB
- Experience in System Verilog/VMM/UVM
- Exposure to Unix, Perl, and TCL scripting
About Synopsys
Synopsys is a world leader in semiconductor IP. We're powering the Era of Smart Everything with advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
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