Analog Layout Engineer

Há 2 semanas

Vila Nova da Barquinha, Santarém, Portugal Capgemini Tempo integral

Capgemini Engineering in Porto is seeking an experienced Analog Layout Engineer with strong Fin FET expertise.
You will design and optimize analog layouts, ensure DRC/LVS compliance, and collaborate with circuit designers to enhance performance and reliability.
Key tasks include EM/IR analysis, parasitic mitigation, and implementation of matching techniques.
Flexibility for hybrid work and international projects is offered.