Digital Security Architect
4 semanas atrás
Job Title: Security Asic Digital Design, Staff Engineer
About the Role:
Synopsys is at the forefront of innovation, powering the Era of Smart Everything with advanced technologies for chip design and software security. We're seeking a skilled Digital Design and Verification Engineer to join our Security IP team in Porto, working on state-of-the-art IP cores and subsystems for High Performance Computing, Artificial Intelligence, and Automotive markets.
Responsibilities:
- Design RTL in Verilog and System Verilog;
- Develop test environments for digital hardware Security IP cores and complex subsystems, in System Verilog and UVM;
- Verify IP cores and subsystems with modern techniques like UVM or formal verification;
- Collaborate with hardware and software security experts on functional and performance analysis of embedded hardware/software IP solutions.
Requirements:
- Expertise in RTL design of hardware IP components;
- ASIC verification skills using System Verilog, UVM, and Verilog;
- Ability to create test environment specifications;
- MSc or PhD in Electrical Engineering or Computer Science;
- 6 years of relevant experience;
- Strong knowledge of IC Design flows and excellent problem-solving and debugging skills.
What We Offer:
Synopsys is committed to inclusion and diversity, considering all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
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