Senior Rtl Engineer: Soc Design
Há 11 horas
Lisbon, Portuguese Republic, Portugal
Capgemini Engineering
Tempo integral
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Capgemini Engineering in Porto, Portugal, is seeking a Senior RTL Engineer to lead digital design from architecture through tape-out for high-performance, power-efficient products.
You will work with cross-functional teams to define microarchitectures, implement RTL using Verilog/SystemVerilog/VHDL, and ensure timing closure and verification across Lint, CDC, and Low Power methods. Hybrid work environment with global project exposure.
You will work with cross-functional teams to define microarchitectures, implement RTL using Verilog/SystemVerilog/VHDL, and ensure timing closure and verification across Lint, CDC, and Low Power methods. Hybrid work environment with global project exposure.