Asic Digital Design, Staff Engineer

Há 4 dias

Porto, Portugal Synopsys, Inc. Tempo inteiro

.We Are:At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.You Are:As a seasoned ASIC Digital Design, Staff Engineer, you possess a robust understanding of ASIC digital development flows and mixed-signal design. You have a knack for identifying and refining circuit implementations to optimize power, area, and performance. Your technical expertise is complemented by your proficiency in producing high-quality technical documentation and your experience with Verilog/VHDL. You are adept at scripting and programming with tools such as Unix Shell, Python, Perl, and TCL. Your exposure to SystemVerilog, VMM, OVM, or UVM, along with knowledge of MIPI or similar protocols, sets you apart. You are organized, have excellent English communication skills, and thrive in a team environment. Your willingness to learn and adapt makes you a perfect fit for our innovative team.What You'll Be Doing:Reviewing SerDes standards and architecture documents to develop analog sub-block specifications.Identifying and refining circuit implementations to achieve optimal power, area, and performance targets.Proposing design and verification strategies that efficiently use simulator features to ensure the highest quality design.Participating in complex block and/or chip planning and architecture studies.Implementing digital portion of mixed-signal blocks using Verilog.Engaging in behavioral modeling activities using Verilog/SystemVerilog language.Continuously documenting and improving design and verification environments/plans and overall procedures.The Impact You Will Have:Contributing to the development of cutting-edge mixed-signal designs that power next-generation technology.Driving innovation in the design and verification of high-performance silicon chips.Enhancing the efficiency and quality of our design and verification processes.Playing a key role in the planning and architecture of complex blocks and chips.Improving the performance and reliability of our products through meticulous documentation and continuous improvement.Collaborating with a talented team to deliver high-end mixed-signal designs from specification development to functional and performance tests on test-chips.What You'll Need:A degree in engineering or applied science.3+ years of experience in IC design flows and exposure to Verilog/VHDL.Proficiency in scripting and programming: Unix Shell, Python, Perl, TCL.Experience with SystemVerilog, VMM, OVM, or UVM.Knowledge of MIPI or similar protocols.Who You Are:Highly organized with excellent English communication skills.Eager to learn new things and adapt to new challenges

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