Staff Asic Digital Verification Engineer

3 semanas atrás

Porto, Portugal Buscojobs Portugal Tempo inteiro

At Synopsys Inc (Permanent), in Porto, PortugalExpires at: 2025-02-24Remote policy: Partial remoteAt Synopsys, we're at the heart of the innovations that change how we work and play. Self-driving cars, Artificial Intelligence, the cloud, 5G, and The Internet of Things are among the breakthroughs ushering in the Era of Smart Everything. We offer the world's broadest portfolio of silicon IP, predesigned blocks of logic, memory, interfaces, analogue, security, and embedded processors - all to help customers integrate more capabilities, meet the unique performance, power, and size requirements of their target applications, and get differentiated products to market quickly with reduced risk. Inclusion and Diversity are essential to us. Synopsys considers all applicants for employment without regard to race, colour, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability. Synopsys seeks an energetic and detail-oriented Staff ASIC Digital Verification Engineer to work with the ASIC Digital Design team.Main requirementsWork in a Digital Design and Verification Development team contributing to developing and validating complex digital circuitry for high-speed interface IP.Conceptualize, design, integrate, validate, and verify Test Environment components, sequences, checkers, and coverage according to the mandates of the Verification Plan, Team Methodology, and Group goals and objectives.Debug failures from the Test Environment down to RTL implementation, search and determine root causes, suggest and implement fixes and/or workarounds, and document and track.Collaborate with peers and superiors to help shape and improve the Test Environment to achieve the best quality and results. Guide junior team members in meeting both their and the overall objectives.Analyze metrics, provide feedback and plan of action, and follow through.Build productive working relationships within the team and across teams and business groups.Participate in applicable product/project reviews.Prepare and present reports of Test Plan coverage, Quality of Results, Performance results, etc.Key QualificationsUniversity degree in Electronics Engineering or Computer ScienceDeep knowledge of IC/Digital Design and Verification flowsComprehensive knowledge of SystemVerilog and UVMComprehensive experience with Simulation toolsVery good problem-solving skills, capable of considering and describing multiple scenarios/approachesGood team playerGood organizational skillsGood English skills, both verbal and written.Preferred Experience5+ years of relevant experience is highly preferredExperience in SystemVerilog/UVMProficiency in at least one object-oriented programming languageExposure to Unix, Python, Perl and TCL scriptingExperience with collaboration tools like Sharepoint/Teams, Jira/Confluence, P4/Git, etc.#J-18808-Ljbffr

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