Asic Digital Verification, Staff Engineer

Há 1 mês

Porto, Portugal Synopsys, Inc. Tempo inteiro

At Synopsys, we're at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we're powering it all with the world's most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world's broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities, meet unique performance, power, and size requirements of their target applications, and get differentiated products to market quickly with reduced risk.
ASIC Digital Verification Engineer
As a member of the Synopsys mixed signal IP team, you will work with global teams to define and develop test plan, test bench, and test cases to verify mixed signal (digital and analog) designs.
Responsibilities:
Generate verification specifications.
Develop test bench design and test cases.
Evaluate and exercise various aspects of the development flow which may include Verilog/SystemVerilog development, functional simulation, constraint development, test planning, behavioral modeling, and verification coverage metrics.
Generate documentation for test plans, verification environments, and usage.
Participate in evaluation and troubleshooting of digital and mixed signal designs.
Key Qualifications:
Proven desire to learn and explore new technologies.
Good communication skills in English.
Strong analysis and problem-solving skills.
Prior knowledge of CAD tools for development.
Working experience with Verilog and SystemVerilog.
Working experience with scripting languages.
Preferred Experience:
Understanding of high-speed interface protocols such as HBM, DDR, DFI.
Understanding of verification methodology such as UVM is a plus.
Typically requires a minimum of 2 years of related work experience.

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