Senior ASIC Digital Design Engineer
3 semanas atrás
We're at the heart of innovation, powering the Era of Smart Everything with advanced technologies for chip design and software security. If you share our passion, we want to meet you.
Our Silicon IP business integrates more capabilities into an SoC—faster. We offer a broad portfolio of silicon IP, including logic, memory, interfaces, analog, security, and embedded processors. This helps customers meet unique performance, power, and size requirements of their target applications and get differentiated products to market quickly with reduced risk.
We're looking for an experienced digital design and verification engineer to work in state-of-the-art IP cores and subsystems. This role involves:
Architecture and design RTL in Verilog and System Verilog
Architecture and design test environments for digital hardware Security IP cores and complex subsystems, in System Verilog and UVM
Hardware verification of IP cores and subsystems with modern verification techniques like UVM or formal verification
In cooperation with hardware and software security experts, perform functional and performance analysis of embedded hardware/software IP solutions
Work in an international team setup
Required qualifications include:
RTL design expertise of hardware IP components
ASIC verification skills (using System Verilog, UVM, Verilog)
Ability to create test environments specifications
MSc or PhD in Electrical Engineering or Computer Science
2 years of relevant experience
Good knowledge about IC Design flows and excellent problem-solving and debugging skills
Strong communication (written and verbal) and interpersonal skills
Inclusion and Diversity
At Synopsys, we consider all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
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