Senior Analog Design Engineer
Há 13 horas
We are at the forefront of technological innovation, driving the Era of Pervasive Intelligence. Our cutting-edge technology shapes the way we live and connect, from self-driving cars to learning machines.
The Position: As a seasoned analog design engineer, you will be pivotal in creating groundbreaking technology that empowers the creation of high-performance silicon chips and software content. With a strong foundation in electrical engineering, you possess extensive experience in analog design simulation and analysis.
You are adept at using various EDA tools for schematic entry, physical layout, and design verification, including SPICE notation and tools like Synopsys Custom Compiler or Cadence Virtuoso. Your expertise in analog design simulation and testbench methodology, including AC, DC, Transient, and Monte-Carlo verifications, sets you apart.
In this role, you will conduct analog design simulation and analysis using novel in-development analog design tools and flows. You will provide valuable feedback to internal tools teams to enhance tool functionality and usability. Additionally, you will document methods, create training materials, and mentor junior engineers to promote growth and development within the team.
Your Impact: By joining our dynamic team, you will enhance the overall efficiency of analog design processes within Synopsys. You will reduce time-to-market for high-performance silicon chips and software content. Furthermore, you will empower junior engineers through mentorship and training, fostering a culture of continuous learning.
Requirements:
- Bachelor's degree in electrical engineering and a minimum of 8 years of related experience or a Master's degree in electrical engineering and a minimum of 6 years of related experience
- Analog design skills and experience with designing for optimal PPA (power, performance, and area)
- Proficiency in simulation using various analog design tools
- Experience with EDA tools for schematic entry, physical layout, and design verification
- Knowledge of analog layout parasitics, especially for low nm technologies (FinFET, GAA)
What We Offer:
- A competitive salary range of $180,000 - $220,000 per year
- A comprehensive benefits package, including health, wellness, and financial benefits
This role is part of a dynamic team dedicated to streamlining design processes and reducing time-to-market. You will collaborate with cross-functional teams and mentor junior engineers to foster a culture of continuous improvement and innovation.
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